This invention relates generally to packaging of edge electrical connectors. More particularly, it relates to high density packaging of an orthogonal electrical connection using a ball edge array.
Electrical packages are constantly increasing in functionality while shrinking in size. In an attempt to assemble more functionality into smaller packages certain limitations become evident. One of these limitations is the number of connections to external circuit elements, commonly referred to as xe2x80x9cinput-outputxe2x80x9d or xe2x80x9cI/Oxe2x80x9d connections, that can be placed at the edge of any given printed circuit board card. The factors limiting the number of I/O connections per card are usually the linewidth of electrical traces on the card or the availability of small edge connectors.
In the prior art, the electrical connections were made using mechanical, e.g. spring loaded, electrical connectors. Such mechanical connectors add to the inductance and capacitance of the electrical trace, which reduces the speed of data that can be carried by the connector. Furthermore, mechanical connectors take up a relatively large amount space, which reduces the maximum number of connectors per unit length.
FIG. 1 is an isometric schematic diagram of an edge pin connector 100 of the prior art. The limitation of this connector is that the size of a pin 104 is relatively large compared to a card 102, therefore few pins may be fit on an edge 106 of the card 102. In addition, the pin 104 attaches on both sides of the card 100 as shown in FIG. 1. This feature eliminates the possibility of having independent I/O connections on both sides of an electrical substrate.
FIG. 2 is another isometric schematic diagram of an edge connector 200, based on edge castellation of the prior art showing a method using a cut-off via 204 to form an edge connection. The number of I/O connections that can fit on an edge of a card 202 is limited by the size of the vias 204 that can be fabricated. Since via 204 is much larger than an electrical trace (not shown in FIG. 2) on the card 202, fewer I/O connections are possible using this technique. In addition, the pitch of the vias is limited by the soldering technique that is used to surface mount the card onto a user""s board. If the pitch is too high, the solder paste may cause an electrical bridge or short between two adjacent vias 204. Furthermore, the use of edge castellation requires the via to contact both sides of the board for an I/O connection, which eliminates the possibility of having independent I/O connections on both sides of an electrical substrate.
U.S. Pat. No. 5,793,116, issued Aug. 11, 1998 to Rinne et al. discloses a method of microelectronic packaging using arched solder columns. In this application, the microelectronic packages are formed wherein solder bumps on one vertical substrate are expanded, to thereby extend and contact the horizontal substrate, which is aligned perpendicularly with the vertical substrate, and form a solder connection. The solder bumps are formed by reflowing the solder. The solder is reflowed from an elongated, narrow solder-containing region adjacent the solder bumps, into the solder bump. The melted solder bumps on a vertical substrate reflow down by gravity and contact the pads on the horizontal substrate. After reflow, the solder bump extends across a pair of adjacent substrates and form an arched solder column or partial ring of solder between the two substrates. However, this technique requires a relatively large amount of solder, and the size of the arched solder column is relatively large compared to the substrate, therefore fewer I/O connections are possible using this technique. In addition, there is a cross connection between the adjacent arched solder columns during the reflowing process.
There is a need, therefore, for an improved method of making an electrical edge connector, which overcomes the above difficulties.
Accordingly, it is a primary object of the present invention to provide an orthogonal electrical connector with the I/O connections on both sides of an electrical substrate without the cross connection between adjacent I/O connections.
It is a further object of the present invention to provide an orthogonal electrical connector with high density packaging of I/O connections.
It is an additional object of the present invention to provide an orthogonal electrical connector capable carrying data at a high speed.
These objects and advantages are attained by a solderable orthogonal electrical connection.
In accordance with a first embodiment of the present invention, an apparatus contains one or more stackable fiber optic transceivers, wherein each transceiver includes an electrical substrate having electrical traces terminating on its edges. Electrical traces that are configured to receive solder are disposed on both sides of the electrical substrate. The apparatus may optionally include molded housings for retaining solder in predetermined position adjacent the electrical traces on the substrates. The molded housings are patterned with voids or pockets. Alternatively the solder may be held in place on electrical traces on a matching motherboard.
The electrical substrate is typically made of ceramic or plastic. The molded housings are made of ceramic, plastic, or metal. The electrical substrate has alignment features such as holes, bump, or shapes. The molded housings may have alignment features conforming to alignment features on the electrical substrate. The solder may be in the form of solder paste or solder balls having a diameter of about 350 microns. The solder may be made of Pbxe2x80x94Sn, Inxe2x80x94Sn, Cuxe2x80x94Ni, or Ag. The density of soldered electrical traces on edges of the electrical substrate is typically about 40 solder traces/inch/side or greater. Apparatuses of this type have each electrical trace capable of carrying data at a speed greater than 100 MHz.
The solder is inserted into voids on molded housings, which are aligned with both sides of an edge of the electrical substrate to hold the solder in predetermined position so that the solder can contact electrical traces. The solder is reflowed to electrically and mechanically attach to electrical traces.
According to a second embodiment of the present invention, an apparatus includes one or more fiber optic transceivers, wherein each transceiver includes one vertical electrical substrate having electrical traces terminating at its edge, and a motherboard perpendicularly aligning to the edges of the electrical substrates. The motherboard has electrical traces made corresponding to electrical traces on the electrical substrate. Electrical traces are disposed on both sides of the electrical substrate. Electrical traces on the motherboard and the electrical substrate are located close enough so that the solder physically touches both parts upon melting. The solder is typically in the form of solder paste or solder balls having a diameter of about 350 microns. The electrical substrate and solder are made of materials similar to those of the electrical substrate and solder in the first embodiment of the present invention. The motherboard is typically made of ceramic, plastic, or metal. The density of soldered electrical traces on edges of the electrical substrate and the speed of carrying data of this connector are similar to those of the density and the speed in the first embodiment.
According to a third embodiment, the substrate and motherboard may be connected according to a method that uses relatively small amounts of solder. In the method, the motherboard is perpendicularly aligned to the edges of vertical electrical substrates. Arrays of solder are deposited on the electrical traces on the motherboard. The solder is melted, reflowed and xe2x80x9cwicks upxe2x80x9d the electrical traces on the electrical substrate by the surface tension. Molded housings of the type depicted in the first embodiment may optionally be used to hole the solder in predetermined position before the solder is reflowed. Thus, when the solder solidifies, it electrically and mechanically bonds to electrical traces.